94028194 V194 Pulse Fanout Module Assembly

October 11, 1995 revised February 13, 1997 C. R. Conkling Jr.

Index
1.0 V194 PULSE FANOUT MODULE ASSEMBLY
1.1 Introduction
1.2 Front Panel Inputs
1.3 VMEbus P2 Connector Inputs
1.4 Quad Line Driver Input Patch
1.4.1 Wire-OR Inputs
2.0 ASSEMBLY AND TEST PROCEDURES
2.1 V194 Pulse Fanout Module
2.1.1 Hazards
2.2 Component installation
2.2.1 Initial Jumper Patch Requirements
2.3 Initial power application
2.3.1 Burn-in power application (if required)
2.4 V194 Pulse Fanout Module Tests
2.4.1 Test Setup For Front Panel Input
2.4.1.1 VME Chassis Power
2.4.1.2 Switch To Test Directory
2.4.1.3 Tests
2.4.2 Test Setup For P2 Connector Panel Input
2.4.2.1 VME Chassis Power
2.4.2.2 Switch To Test Directory
2.4.2.3 Tests
2.5 Removal of Ribbon Cable
2.6 V194 Test Initialization Files
2.6.1 VxWorks Shell Commands
2.6.2 File v194init
2.6.3 File v194t1
2.6.4 File v194t2
2.6.5 File v194t3

1.0 V194 PULSE FANOUT MODULE ASSEMBLY

1.1 Introduction

The V194 Pulse Fanout Module contains four quad integrated circuit line drivers - 16 outputs. The four SN75130 quad, single-ended, line drivers are capable of driving 50 ohm loads. The quad line driver inputs are tied together, therefore the fanout module provides four one input-to-four output expansions. The module accepts single-ended inputs from the module front panel or VMEbus.

The four inputs of each quad line driver are connected together, and connected to a 12-position input jumper selector patch. The quad line driver input can be selected from:

The V194 Pulse Fanout Module is VME sized, requires VMEbus power, but doesn't interface to the VMEbus signals. It does pass through the interrupt enable line (IACKIN*/IACKOUT*), and the bus grant lines (BG[0..3]IN*/BG[0..3]OUT*).

1.2 Front Panel Inputs

The four single-ended front panel inputs, J1, J6, J11, and J16 are terminated by a series 24/36 ohm resistive voltage divider. The resistance of the voltage divider is approximately 50 ohm when the LED diode in the Hewlett Packard 6N137 optoisolator is conducting.

The four front panel NIM/CAMAC input connectors, terminators, and optoisolators are mounted on a small isolated ground plane. Jumper patches allow the isolated input ground plane connection to:

Four Hewlett Packard 6N137 optoisolators are located half on the input isolated ground plane, and half on DGND. The optoisolators provide a ground isolation if required. The 6N137 output is inverted, open-collector, TTL. The output is connected to a 470 ohm pullup, and a 74LS04 hex inverter to restore the logic level. The four isolated inputs are connected to jumper patch pins at the four quad line drivers.

NOTE: If a front panel input is selected, the 50 ohm terminator at the quad line driver must not be jumpered active.

1.3 VMEbus P2 Connector Inputs

In the VMEbus specification VMEbus connector P2 row A & C are reserved for user input/output. The V194 Pulse Fanout Module P2 input is the same as the V102/V104 Delay/Decoder module outputs. A ribbon cable jumper can patch the eight single-ended outputs of the V102/V104 module into the V194 module. The eight inputs, PULSE[8..1], are connected to jumper patch pins at the four quad line drivers.

NOTE: If a P2 input is selected, the input 50 ohm terminator must be jumpered active. However, if more than one quad output driver is selected to obtain greater than 1-to-4 fanout, only one 50 ohm is required.

1.4 Quad Line Driver Input Patch

Each quad line driver input is selected by a 12-position jumper patch. The configuration is:

pin pair

NOTE: Front panel inputs may drive more than one quad line driver. However, front panel inputs can't be wire-ORed with other front panel inputs or PULSE[8..1] inputs!

The common side of the 12-position jumper patch is connected to a 50 ohm termination resistor and the four inputs of the quad line driver. The ground side of the 50 ohm terminator is connected to a jumper patch. The terminator is used with the P2 inputs, but not the isolated front panel inputs.

1.4.1 Wire-OR Inputs

V102/V104 Delay/Decoder module outputs PULSE[8..1], connected through V194 Pulse Fanout module P2 inputs may be wire-ORed at the quad line driver inputs. Connect as many PULSE[8..1] inputs as required using the 12-position jumper patch, and patch one terminating resistor on.

NOTE: V102/V104 Delay/Decoder module outputs may not be wire-ORed in the AGS, or software inverted output modes!

2.0 ASSEMBLY AND TEST PROCEDURES

2.1 V194 Pulse Fanout Module

The assembly drawings are:
   94028192 Schematic Diagram - V194 Pulse Fanout Module
     94028192 Printed Circuit Drill & Screening - V194 Pulse Fanout
Module
     94028195 Front Panel Drill & Screening - V194 Pulse Fanout Module
     94028194 Printed Wiring Board Assembly - V194 Pulse Fanout Module

2.1.1 Hazards By itself, the V194 Pulse Fanout Module does not use or contain any hazardous voltages or materials.

WARNING: The VME chassis power supply can supply 120 A @ 5 VDC. While not hazardous, be careful with test lead ground clips etc..

2.2 Component installation

REQUIRED EQUIPMENT:

1 - 3X magnifying glass
1 - multimeter

Using the assembly drawing, 94028194, check orientation and value of each part.

        DGND P1A9, P1A11, P1A15, P1A17, P1A19, P1B20, P1B23, P1C9
             P2A32, P2B2, B2B12, P2B22, B2B31, P2C7 through P2C32

         +5V P1A32, P1B32, P1C32, P2A14, P2A15, P2B1, P2B13, P2B32

2.2.1 Initial Jumper Patch Requirements

2.3 Initial power application

REQUIRED EQUIPMENT:
     1 - BICC-Vero 6U extender board, modified to isolate +5V
(preferred)
                                     or
         Kerner VME DEBUGGING ISOLATION BOARD, Assembly D09-E2386-5
     1 - Current limiting 5 VDC, 5A power supply.
     1 - multimeter

2.3.1 Burn-in power application (if required)

REQUIRED EQUIPMENT:

1 - VME chassis (timeline test VME chassis not useable).

2.4 V194 Pulse Fanout Module Tests

2.4.1 Test Setup For Front Panel Input

REQUIRED EQUIPMENT:
     1 - Timeline VME test chassis (modified with V101 bus).
     1 - Motorola model MVME162 host CPU in slot 1 set as TARGET3.
     1 - LAN connection for host CPU.
     1 - Console CRT w/null modem cable.
     1 - V100 RHIC Timeline Encoder Module.
     2 - V101 RHIC Timeline Input Modules.
     1 - V102 RHIC Timeline Delay Module.
     1 - V199 Passive Load Module.
     1 - Pulse generator.
     1 - Digital Oscilloscope w/probes.
     1 - Coaxial cable with BNC connectors, and adaptor BNC to K-lock.
     2 - Twin-axial cables with twin-BNC connectors, approximately
36-48 inches.
     8 - Timing coaxial cables with K-lock connectors, approximately
24-36 inches. 
     1 - K-lock "T" connector (BNL A-69840)
     1 - Ribbon cable, 64-wire, with two connectors T&B 609-642-3 (BNL
A-66250) wired pin-to-pin, approximately 4 inches.

WARNING: Put tag on front of test chassis that ribbon cable jumper is installed!

NOTE: Remove all K-lock timing cables.

2.4.1.1 VME Chassis Power

When 2.4.1 above is complete, apply primary power to the VME chassis:

2.4.1.2 Switch To Test Directory

The following commands will change the startup directory to a directory that contains more testing routines.

2.4.1.3 Tests

This test tests the V194 module capability to drive a 50 ohm load (the V101 input module), using front panel inputs driven by the V102 Delay module.

2.4.2 Test Setup For P2 Connector Panel Input

REQUIRED EQUIPMENT:

Same as 2.4.1

NOTE: Remove all K-lock timing cables.

2.4.2.1 VME Chassis Power

When 2.4.2 above is complete, apply primary power to the VME chassis:

2.4.2.2 Switch To Test Directory

The following commands will change the startup directory to a directory that contains more testing routines.

2.4.2.3 Tests

This test tests the V194 module capability to drive a 50 ohm load (the V101 input module), using front panel inputs driven by the V102 Delay module.

2.5 Removal of Ribbon Cable

When tests are complete, remove the ribbon cable jumper between slots 3 & 4, and remove chassis warning tag.

2.6 V194 Test Initialization Files

2.6.1 VxWorks Shell Commands


display memory
d address,number,byte
d 0xffffaaaa,0xnn,1
where aaaa is the short address and n is the number of bytes to display

modify memory
m address,byte
(return for next byte)
(exit type period ".")

buffer fill
bfillBytes address,length,contents,byte
bfillBytes 0xffffaaaa,0xnn,0xbb,1
where aaaa is the short starting address,
         n is the number of bytes to fill,
    and bb is the fill byte.

repeat function
repeat number,function,argument(s)
example write a byte 
repeat 0,bfillBytes,0xffffaaaa,1,0xbb,1

If the repeat number is 0 it repeats forever, or until the task is
deleted. Note the task number when the repeat is started. Then type
to cancel the task:

td task number

repeat last command esc-K

2.6.2 File v194init

ld <v101util.o
ld <wbyte.o
wrdatb 0xffff3000,0x200,"v194t1"
wrdatb 0xffff3800,0x180,"v194t2"
wrdatb 0xffffe600,0x200,"v194t3"

2.6.3 File v194t1

This file sets up the V100 command register, and translation table.

  2e  56  2e  4d  2e  45  2e  49  2e  44  2e  42  2e  4e  2e  4c
  2e  56  2e  31  2e  30  2e  30  2e   0  2e   0  2e   0  2e   0
  2e   0  2e   0  2e   0  2e   0  2e   0  2e   0  2e   0  2e   0
  2e   0  2e   0  2e   0  2e   0  2e   0  2e   0  2e   0  2e   0
   0   1   0   1   0   1   0   1   0   1   0   1   0   1   0   1
   0   1   0   1   0   1   0   1   0   1   0   1   0   1   0   1
   0   1   0   1   0   1   0   1   0   1   0   1   0   1   0   1
   0   1   0   1   0   1   0   1   0   1   0   1   0   1   0   1
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0  14   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0

2.6.4 File v194t2

This file sets up both V101 command registers.

  2e  56  2e  4d  2e  45  2e  49  2e  44  2e  42  2e  4e  2e  4c
  2e  56  2e  31  2e  30  2e  31  2e  ff  2e  ff  2e  ff  2e  ff
  2e  30  2e  41  2e  ff  2e  ff  2e  30  2e  30  2e  30  2e  32
  2e  ff  2e  ff  2e  ff  2e  ff  2e  ff  2e  ff  2e  ff  2e  ff
  ff  ff  ff  ff   0   0   0   0  ff  50  ff   1  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
  2e  56  2e  4d  2e  45  2e  49  2e  44  2e  42  2e  4e  2e  4c 
  2e  56  2e  31  2e  30  2e  31  2e  ff  2e  ff  2e  ff  2e  ff
  2e  30  2e  41  2e  ff  2e  ff  2e  30  2e  30  2e  30  2e  31
  2e  ff  2e  ff  2e  ff  2e  ff  2e  ff  2e  ff  2e  ff  2e  ff
  ff  ff  ff  ff   0   0   0   0  ff  51  ff   1  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff

2.6.5 File v194t3

This file sets up the V102 command register, channel delay/pulse
tables, and ecent code trigger table.

  2e  56  2e  4d  2e  45  2e  49  2e  44  2e  42  2e  4e  2e  4c
  2e  56  2e  31  2e  30  2e  32  2e   0  2e   0  2e   0  2e   0
  2e   0  2e  42  2e   0  2e   0  2e   0  2e   0  2e  32  2e  38
  2e   0  2e   0  2e   0  2e   0  2e   0  2e   0  2e   0  2e   0
  ff   1  ff   0  ff   0  ff   0   0   0   0   1   0   1  21   0
   0   0   0   1   0   1  22   0   0   0   0   1   0   1  21   0
   0   0   0   1   0   1  22   0   0   0   0   1   0   1  21   0
   0   0   0   1   0   1  22   0   0   0   0   1   0   1  21   0
   0   0   0   1   0   1  22   0  ff  ff  ff  ff  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff  ff
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0  55   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0
   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0