RHIC EVENT TIMING SYSTEM

RHIC EVENTLINK

August 1993

last revision November 3, 1997


PAC95Accelerator Timing at Brookhaven National Laboratory
1.0 RHIC EVENTLINK SYSTEM
2.0 V100 EVENT ENCODER MODULE
3.0 V101 EVENT INPUT MODULES
4.0 V102 DELAY MODULE 
5.0 V103 RHIC MASTER RESET MODULE
6.0 V104 DECODER MODULE
EVENT MODULE VME CHASSIS

1.0 RHIC EVENTLINK SYSTEM

1. 1 INTRODUCTION

A modern accelerator must synchronize the operations of equipment over a wide area. To facilitate this synchronization the RHIC event system provides a highly reliable, serial timing link to all equipment locations. Events and clocks derived from this link are be used to initiate hardware operations including changes in settings, state changes, and data acquisitions. Events may also be required by software running on systems not directly coupled to accelerator hardware. A standard clock frequency of 10 MHz, the same eventlink frequency as the AGS and Booster, provides adequate resolution for timing events in the RHIC operational and experimental processes.

Two mechanisms are available for generating events on the RHIC eventlink, direct hardware inputs and software initiated commands. Optically isolated TTL-level inputs are provided for each of the 256 possible event trigger inputs. Event sequences initiate waveforms, fire kickers, and acquire data during the acceleration cycle, tune measurements, etc. will be implemented by cascading programmable delays. Clocks that are of a general interest, such as the 720 Hz clock generated by the main magnet power supply system are available on the RHIC eventlink. Externally generated events may also come from other systems sensing unusual conditions with the beam. In the case of a beam abort, the abort event can be used to freeze circular buffers in digitizers for postmortem analysis.

An example of a software generated event would be one to activate new equipment settings after they have been loaded and verified. Software generated events also provide a convenient way to commission new systems.

The probability exists that several event requests could occur simultaneously, or overlapped in time. Since only one event can be transmitted at a time, priority resolution is an integral part of the central encoding facility. Event contention is handled in hardware with highest priority given to trigger input 0 and lowest given to trigger input 255. It should be pointed out, however, that lower priority events being processed will not be interrupted by the arrival of a higher priority event trigger.

The RHIC central event encoder is located in building 1004B, the 4 o'clock equipment house. The V100 event encoder, its V101 input modules, and supporting front end computer interface occupy a single VME chassis. Each V101 input module supports 16 event trigger inputs. The eventlink interconnections are point-to-point, differential TTL. The V100 event encoder module is isolated from its receiver by transformer coupling at the receiver. The V100 event encoder initially drives a D09-E2440 fanout assembly which provides 16 buffered, TTL differential outputs. Some outputs will be used locally within building 1004B, and others will drive fiber-optic transmitters for transmission to other RHIC equipment locations.

At each RHIC equipment location, the fiber-optic transmission is converted to ECL, then TTL, and output as differential TTL. Again the D09-E2440 fanout assembly is used to produce multiple outputs. General purpose V102 delay modules may be located in these remote locations, as well as other modules having direct eventlink inputs (e.g. V115 waveform generators).

The V102 delay modules accept the RHIC eventlink transmission, decode selected event codes, and generate TTL compatible event pulses following individually programmable delay intervals. The module outputs have 50 ohm drive capability. It is recommended that equipment using these event pulses provide optical isolation to eliminate ground loops.

The event codes are transmitted using a serial modified Manchester code (bi-phase-mark). The transmission rate is 10 M Bits/sec, and 1.2 usec are required to transmit an event code. The eventlink contains a continuous bi-phase-mark "ones' transmission during idle periods. A single event code transmission is shown in figure below.

There is a 1.3 usec event code transmission delay, measured from the event trigger to start of transmission, built into the event system. This delay allows very high priority events will be transmitted with minimum jitter relative to the eventlink(-O, + 100 nsec). If a higher priority event trigger is received while a lower priority event trigger is being delayed, the delay is reset, and the high priority event code will be transmitted before the low priority event code (with its own 1.3 usec delay).