V126 FEB Control Module
Rev 0.2 25 June 99
The V126 FEB Control module will be used to generate one of three different FEB event outputs (FebGreen, FebBlue or FebYellow) from the input event Feb Request. FebGreen is the default output and the V126 can be set to output this event indefinitely. FebBlue or FebYellow events will be set to output a finite number of pulses (1-127) with control automatically switching back to FebGreen output when the count cycle is done.
The V126 is designed to reside in a VME chassis, shall occupy one VME board slot (4HP front panel width) and fit into a 6U X 160mm standard Eurocard form factor. The front panel of the V126 will contain connectors for input signals and LED's to indicate output events. The V126 shall require +5V power. The V126 shall communicate with the FEC over the VME back plane. The V126's VME interface shall be a buss slave type and support A16 and D8. The V126 does not support any interrupts. The base address for the V126 will be set using address bits A15 - A7.
There are three inputs to the V126, FebRequest, Permit and a Spare input. All three use Lemo connectors and are optically isolated. Additionally FebRequest input has an LED associated with it.
There are four outputs from the V126, FebGreen, FebBlue, FebYellow and a Spare output. All four use Lemo connectors, are driven with 50-ohm buffers and have LED indicators associated with them.
The following is the memory map for the V126.
DESCRIPTION VME ADDR/VME ADDR RANGE
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ID Prom_________________________Base Addr + 0x00 - 0x3f
FEB Control Register____________Base Addr + 0x41
FEB Blue Count Register_________Base Addr + 0x43
FEB Yellow Count Register_______Base Addr + 0x45
The FEB control register, FEB Blue count register and the FEB Yellow count register are all readable/writable from VME.
B0 - Sel 0
B1 - Sel 1
B2 - Blue Count Enable
B3 - Yellow Count Enable
B4 - Output Enable Control
B5 - Output Enable
B6 - Permit Enable
B7 - Pulse Control
Sel1 Sel0 | Output
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0_____0 | FEB Green
0_____1 | FEB Blue
1_____0 | FEB Yellow
1_____1 | INVALID
NOTE: To insure proper circuit function the Blue Count Enable bit (B2) and the Yellow Count Enable bit (B3) are mutually exclusive and both MUST NOT be set to 1 (one) at the same time.
NOTE: When a count cycle (blue or yellow) is complete (the counter decrements from the number entered to zero), the FEB control register bits B3, B2, B1 & B0 will be reset to a value of 0 (zero).
NOTE: The Permit input only affects FebGreen output pulses. FebBlue and FebYellow output pulses are not affected by the Permit input.
NOTE: Upon VME power up or VME /SYSRST all bits in the Feb Control register ( base addr + 0x41) will be reset to zero.
NOTE: Upon VME power up or VME /SYSRST both blue and yellow count registers will be reset.