Accelerator Controls Section RHIC Project
Brookhaven National Laboratory Associated Universities Inc.
Upton, New York 11973
Power Supply Waveform Generator Module Design Specification
Preliminary
December 1, 1992
T. Kahn

Table of content

1 Introduction
2 Functionality
2.1 Waveform Definition
2.2 Power Supply Controls
2.3 Read backs
2.4 Reboot
3 Hardware Architecture
3.1 Microprocessor, Memory Systems and I/O Registers
3.2 Busses
3.2.1 Memory Bus
3.2.2 I/O Bus
3.2.3 External i/o Bus
3.2.4 System Bus (VME)
3.2.4.1 VME Slave Devices
3.2.4.2 VME Memory Map
3.2.4.3 Bit Usage of Registers
3.2.4.4 Other VME Interface Options
3.3 Transition Module
3.3.1 Transition Module Interface
4 The Score Board
5 Front-End Computer to Waveform Generator Communication
5.1 Handshaking Sequence
6 Commands
6.1 Load
6.1.1 Parameter ID
6.1.2 Event group
6.1.3 Parameters and Data Formats
6.1.3.1 Scale Factor
6.1.3.2 Function f Look-Up Table
6.1.3.3 Function g Look-UP table
6.1.3.4 Function h Look-Up Table
6.1.3.5 Multiplier-Type
6.1.3.6 Variable-Type
6.1.3.7 Event
6.1.3.8 Rate
6.2 Read
6.2.1 Parameter ID
6.2.2 Event group
6.2.3 Parameters and data format
6.3 Associate
6.3.1 Parameter ID
6.3.2 Event Group
6.3.3 Parameters and Data Format
6.4 Test
6.4.1 Parameter ID
6.4.2 Event group
6.4.3 Parameters and data format
6.5 Enable
6.5.1 Parameter ID
6.5.2 Event group
6.5.3 Parameters and data format
7 Error Code
7.1 Handshaking Error
7.2 Waveform Generator Critical Error
8 Mechanical Specification
9 Electrical Specification
9.1 Busses
9.2 Power Supply

1 Introduction

The wave form generator is used primarily to provide RHIC power supplies with reference functions. Its basic functionality is adapted from Fermilab CAMAC module 465 which meets superconducting storage ring operational requirements. The following improvements will be made:

1. more efficient host interface
2. higher resolution ( 24 bit )
3. longer look-up tables ( 128 entries for time-dependent function )
4. globally synchronized waveform update
5. remote code updates
6. upgrade the 80960 processor from KA to CA
7. output tracks the 720 Hz clock

[Mdat is Fermilab's terminology for the broadcast machine data. The term, Mdat, is used in this pecification and will be replaced with the RHIC terminology when available.]

2 Functionality

2.1 Waveform Definition

The output of waveform generators is the sum of one time-dependent and two RTDL parameter-dependent functions, and can be expressed as follows:

W = sf * mf * F(t) + sg *mg * G( x ) + sh * mh * H( y )

• Where:
  • sf, sg and sh are scale factors for function F(t), G( x ) and H( y ), respectively.
  • mf, mg , and mh are multipliers for function F(t), G( x ) and H( y ), respectively, and may be programmed to be any type of RTDL parameters broadcasted. The multipliers can be programmed to take the absolute value of any bipolar parameter for unipolar application. For multipliers set to be parameter type zero, the invalid type, multiplying by one is assumed.
  • x and y are independent variables for function G( x ) and H( y ), respectively, and may be programmed to be any type of parameters broadcasted over the RTDL.
  • F(t) = ( fn, delta_tn ), n=1,2...127,128. That is a two dimension 128-entry look-up table. The fn's define the increment in amplitude. If delta_t1= 0, f1 defines the initial value of F(t). Otherwise, the F(t) will be continued from the previous F(t). The function is linearly interpolated between tn and tn+1. Delta_t is in unit of second and will be converted into number of clock ticks according the programmed rate.
  • G ( x )=(gn, xn), n=1,2...63,64. That is a two dimension 64-entry look-up table. The gn's define the amplitude at xn. The function is linearly interpolated between xn and xn+1.
  • H ( y )=(hn, yn), n=1,2...63,64. That is a two dimension 64-entry look-up table. The hn's define the amplitude at yn. The function is linearly interpolated between yn and yn+1.
  • The terms defined above are all normalized. W = 1 represents full scale of DAC output.

2.2 Power Supply Controls

The RHIC operation demands different functions for the different stages of machine operation. The waveform generator shall be capable of storing up to 16 sets of functions, scale factors and multiplier types which will be activated on-the-fly by selected accelerator clock events. A group of events may have the same effect, and are referred as an event group. The waveform generator shall be capable of managing up to 16 event groups. Each event group shall be associated with one set of functions, scale factors and multiplier types. The event groups shall be programmable from Front-End Computers. Each group may comprise up to 8 unique events, which must not be shared by other groups.

All elements that define Vout are down-loadable from Front-End Computers and are referred to as the parameters, hereafter. The exception is delta-t, which is derived from a local rate generator. The vg and vh are not event-dependent parameters. They are programmable, but rarely changed for a given application. For other down-loaded parameters to be effective, the parameter must be associated with an event group first. Then the occurrence of any event defined in the group will activate the parameter. One parameter may be associated with multiple event groups.

In addition to the parameters, special operations may be associated with an event group. The Front-End Computer must individually enable the special mode before the occurrence of the associated event. The special modes include stop/continue,{ turnoff power supply }and copying the final value of the f(delta-t) into the two surrounding slots of g indexed by current vg.

The time-dependent function shall be calculated at the programmable rate of |720 hz|,1, 5 or 10 Khz. An event synchronized rate generator is used to provide the timing reference. The Mdat-dependent function components shall be calculated at the Mdat update rate. The actual waveform output, the sum of all three components, is updated at the same rate that the time-dependent function is calculated.

The waveform generator may be configured to synchronize with a 720 Hz event decoded from the event link. Since the 720 Hz event is asynchronous with other clock events, the time-dependent function update may be delayed by as much as 1/720 second.

The output resolution of the waveform generator is 24 bits, two's complement. By programming the parameters alone, both unipolar and bipolar applications can be accommodated. Lower resolution applications may be accommodated by discarding the low-order bits.

The waveform generator shall obtain the clock events and Mdat directly from the broadcasting media.

2.3 Read backs

The wave form generator shall be capable of read 2 digitized analog channels from the power supply interface. One circular buffer per channel shall be implemented to support circular, pre-trigger and post-trigger recording. The buffer may be read by the Front-end on demand while the current reading is always available. The maximum recording time shall be 10 seconds, at rate of 720 hz.

In addition to the analog channels, the set point loop-back data will be recorded in the same fashion for diagnosis.

2.4 Reboot

There are four ways to boot the waveform generator: power-on, SYSRESET*, reset button, and commanded reboot. On reboot, the waveform generator enters local initialization stage and drive SYSFAIL* low. At the end of the initilization SYSFAIL* will be deactivated and the waveform generator will be ready to accept the front-End's request.

3 Hardware Architecture

The waveform generator demands a great deal of flexibility and a moderate update rate that is well-matched by current microprocessor technology. As shown in Figure 1, the waveform generator consists of a processor board and an i/o transition module. The processor board has a VME slave interface for data flow, diagnosis and program code updating. The transition module handles power supply control interfaces and RHIC broadcast links.

The processor board is an embedded microprocessor design, consisting of an i80960CA microprocessor, EEPROM for code, SRAM for data and non-volatile RAM for parameters. The use of EEPROM permits remote code updating. The code stored in the EEPROM is copied over to SRAM for fast access after boot.

3.1 Microprocessor, Memory Systems and I/O Registers

The microprocessor i80960CA, built-in with an interrupt controller, a 4-channel DMA controller and a bus controller, is used to power the waveform generator providing 64Mip at 32 Mhz. There are no support chips required, except memory systems.

There are five memory systems required, each occupying its own region which is determined on the basis of the memory system characteristics. Two i/o regions are allocated, one for the onboard i/o and one for the transition module i/o. The regions are defined as follows:

• Region F EEPROM 8-bit, 4 wait state/read, no burst, no pipeline
• Region B Dual-ported SRAM 32-bit, 1 wait state, burst, no pipeline
• Region A SRAM 32-bit, 1 wait state, burst, pipeline
• Region 9 On board Timer 16-bit, 4 wait state, no burst, no pipeline
• Region 8 Off board IO A 32-bit, 4 wait state, no burst, no pipeline
• Region 7 Off board IO B 32-bit, 4 wait state, no burst, no pipeline
• Region 6 On board IO 16-bit, 4 wait state, no burst, no pipeline

Figure 1 System Architecture, with digital i/o transition module

3.2 Busses

There are four busses implemented on the processor board, namely memory bus, i/o bus, external i/o bus and system bus (VME).

3.2.1 Memory Bus

The memory bus is the primary bus and is directly connected to the processor for fast memory access. The SRAM and dual-ported SRAM are the only devices directly accessible via this bus. The memory bus is also used to route traffic to the i/o bus, to which the slower devices may be attached.

The memory bus is capable of burst and pipeline 32-bit transfer.

3.2.2 I/O Bus

The i/o bus is buffered from the memory bus. Both 8- and 16-bit devices are supported. To minimize CPU signal loading all other devices, including EEPROM and Non-volatile RAM, are accessible via the i/o bus.

3.2.3 External i/o Bus

The external i/o bus is designed to interface with off-board transition modules with two predecoded select lines, supporting 32 bit data transfer. The external i/o bus is extended to the transition modules via the P2 connector Rows A and C.

3.2.4 System Bus (VME)

The processor board interfaces with the RHIC Front-End Computer via the VME Bus. The processor board is strictly a slave board accessible from the Front-End Computer.

The processor board supports D08(OE), D16 and A24( RHIC control standard address mode ) VME transfer, responds to the address modifier {|3Dh and 39h|}, and requires 256k bytes of address space. The block of 256K bytes can be located within the A24 memory space at the base address of 256k and multiples thereof. The base address is jumper selectable. The dual-ported memory also response to address modifier h3f for block transfer.

The VME interface design shall comply with VME specification 1014-87. The devices described in 3.2.3.1, 3.2.3.2 and 3.2.3.3 are viewed from the VME side.

3.2.4.1 VME Slave Devices

1. A dual-ported RAM of 2k x 16, the primary data channel for host interface.
2. A score board of 2k x 16, read only from the Front-End Computer.
3. One 8-bit handshaking-in/out register, read/write
4. One 8-bit interrupt vector register, read/write
5. One 8-bit interrupt line register, read/write
6. One 8-bit control command/status register, read/write
7. An EEPROM of 128k x 8, supporting D08(OE) only

3.2.4.2 VME Memory Map

• Base address + 0 -------> EEPROM, 128k x 8
  • + 20000h -------> Score board, read only, 2k x 16
  • + 21000h -------> dual-ported SRAM, 2k x 16
  • + 3fff8h -------> Control command/status
  • + 3fffah -------> Interrupt line register
  • + 3fffch -------> Interrupt vector register
  • + 3fffeh -------> Handshaking-in/out register

3.2.4.3 Bit Usage of Registers

All bits are level sensitive, except where otherwise specified.

Handshaking I/O:

• write:
  • bit 7 Request-To-Send
  • bit 6 Data-Ready
  • bit 5 Ready-For-Data
• read:
  • bit 7 Busy
  • bit 6 Done
  • bit 5-0 Error code ( handshaking and parsing only )

Interrupt vector register:

• bit 7-0 Vector #

Interrupt level register:

• bit 2-0 VME back plane interrupt line 1-7; 0, no interrupt
• bit 6 1 = Enable End-of-data-acquisition interrupt
• bit 5 1 = Enable Done interrupt
• bit 4 1 = Enable Critical-error interrupt

Control/status:

• write:
  • bit 7 1 = Code Update
  • bit 6 1 = Reboot
• read:
  • bit 7 1 = Code Update In process
  • bit 6 1 = End of local init. deasert *sysfail on VME bus.
  • bit 5 1 = End of data acquitision
  • bit 4-0 critical error code, see paragragh 7.2 for error codes|}

3.2.4.4 Other VME Interface Options

1. The waveform generator may be jumper-selected to drive Sysfail* .
2. The waveform generator supports Single Byte Interrupt Acknowledge Cycle and Release-request On Register Access ( RORA ).

3.3 Transition Module

The waveform generator i/o is implemented on a transition module. There will be two versions of transition modules. One outputs a digital setpoint, the other an analog setpoint. (See waveform generator transition module specifications for details.)

3.3.1 Transition Module Interface

The follow signals will be propagated to the transition module via P2 Row A and C to support bus slave application with 16-bit data and 1 megabyte address space.

1. xbd[0-31] 32-bit bi-directional data bus
2. xba[2-11] 10-bit out bound address bus
3. xbe[0-3] 4 byte enable lines
4. xioa transition module i/o select A
5. xiob transition module i/o select B
6. xiowr write strobe
7. xiord read strobe
8. event_in coded serial event input
9. Mdat_in coded serial machine data input
10. permit_in coded serial permit input
11. xiopin[1-8] generic i/o may be wired for interrupt, DMA and local timers
12. reset , +/-12v

4 The Score Board

The score board is implemented to provide the Front-End Computer with access to real-time information about the waveform generator without going through the Request-Reply sequence. The score board can be viewed as read-only memory from the Front-End Computer. The data will correspond to a well-defined set of 'c' structures and consist of the followings:

1. The last frame of machine data-type/value.
2. The last eight events occurred in each event group in the chronological order.
3. Current Sf, Sg and Sh.
4. Current mf, mg, mh, vg and vh value.
5. Previous f ,g, h entries.
6. Next f, g, h entries.
7. Current interpolated f, g, h.
8. Most recent event and its group number.
9. Time counts from the most recent event.
10. Power supply status word.
11. Waveform generator status word.
12. Serial i/o error.
13. Waveform output and its three components.
14. Last power supply command executed.
15. Special modes enabled, the corresponding event group.
16. Parameter groups and event groups associative map.
17. Update rate.
18. Module ID /version control.
19. Most recent Readbacks (in mux channel order).
20. Channel # of which data acquisition is completed.

The score board is viewed from the local cpu as a part of the run-time variables. Therefore there is no overhead to post this information.

5 Front-End Computer to Waveform Generator Communication

The primary data channel for down loading and reading back the 16 sets of parameters is the dual-ported RAM. In order to protect the data integrity in the dual-ported RAM. Two registers are used, in conjunction with an interrupt mechanism, for handshaking between the Front-End Computer and the wave form generator. The Front-End Computer has the option of polling or using interrupt, and under what condition the slave should interrupt.

The communication protocol utilizes the VME slave devices defined in paragraph 3.3. For the look-up table size currently defined, the 2kx16 buffer (dual-ported RAM ) is sufficient to download a function look-up table of 64 entries in a single transaction. A provision is made in this protocol to handle parameter lists that may grow longer than 2k words.

5.1 Handshaking Sequence

As shown in Figure 2 and 3, the Front-End Computer to waveform generator communication cycle begins with the Front-End Computer setting the Request-To-Send bit high when the waveform generator is NOT Busy. Upon sensing Request-To-Send, the waveform generator sets the Busy bit indicating that the connection between the requesting Front-End Computer and the responding waveform generator is established.

Figure 2 VME master Function Generator Communication Sequence

The Front-End Computer is now ready to download a packet of the command record. Upon completion of downloading, the Front-End Computer will set the Data-Ready bit to inform the wave form generator. The wave form generator must store away parameters before clearing Data-Ready and raising the Done flag. On the other side of the channel, the Front-End Computer must wait for the Done flag to download remaining packets of the record, if any, by repeating the steps described in this paragraph until the last packet is sent. The Done flag may interrupt the Front-End, if so desired. Reading handshaking register clears Done flag and the parsing error.

On a READ command that requires a reply record, the waveform generator than waits for the Front-End to set the Ready-For-Data bit before filling the dual-ported RAM with a reply packet. The wave form generator must set the Done flag to inform the Front-End that a reply is available. If the reply record consists of multiple packets, the Front-End must store away the packet before raising the Ready-For-Data flag again. The wave form generator will fill the dual-port RAM with next reply packets. The Ready-For-Data and Done handshaking will be repeated until the reply record is completed.

At the end of a record transfer or time-out, the waveform generator lowers Busy flag and enters the idle state. The Busy and Request-To-Send bits are mapped at the same VME address location and support the Read-Modify-Write cycle. The Front-End Computer can test Busy and set Request-To-Send in one non-interruptable operation. Therefore the mutual exclusion is accomplished at the hardware level.

If any error occured during the hand shaking and command parsing, the error code bits will be set together with Done flag.

Figure 3 Function Generator to VME master Communications Sequence

5.2 Command and Reply Records

The command record is designed to download commands and parameters, while the reply record to read back parameters for verification and diagnosis. The reply record becomes available only when a read command is executed. The Front-End Computer shall anticipate the reply after sending a read command.

The command/reply records must be aligned with the dual-ported RAM base address and consist of the following:

1. Number of packets constituting the record
2. Packet sequence number
3. Parameter starting offset, the offset for the first element is zero (0)
4. Parameter ending offset
5. Command
6. parameter ID
7. Event Group Number (0-15)
8. Parameter list

Items 1-4 are record-keeping entries which are needed for records too long to fit in a single packet. These entries are checked by the local cpu for any possible errors. A partial parameter list is permitted to reduce overheads; however, the reply always produces a complete list. The length of the list depends on the parameter type.

The Event Group Number is optional or not applicable for certain commands and parameters, in which case this field shall contain 'NULL'. The parameter entries must be listed in ascending order, starting with the entry specified by the starting offset and ending with the ending offset.

The following is an example of a command record: (msb----lsb)

• 0001 <---- Packet sequence number, 16 bit ordinal
• 0001 <---- Number of packet for the complete record, 16 bit ordinal
• 0001 <---- Parameter list starting offset, 16 bit ordinal
• 007f <---- Parameter list ending offset, 16 bit ordinal
• 'LOAD' <---- command, 4 byte ascii
• 'LF01' <---- parameter ID, look-up table 1 for function f, 4 byte ascii
• 'EG15' <---- Event Group Number that selects LF01, 4 byte ascii
• f ( delta-t0 )/delta-t0 <---- first parameter
• .
• .
• f ( delta-t127 )/delta-t127 <---- last parameter

6 Commands

The valid commands are: Load (parameters), Read (parameter), Asso ( event group with parameters), {Force (event or machine data),} |Test (test procedure # ), {Control (power supply command)} and Enable (special mode).

The wave form generator uses a fixed format command record, 4 bytes for each entry listed above. The command and ID field are ASCII ( case sensitive). If an optional entry is not used, 'NULL' must be entered.

6.1 Load

The load command is 'LOAD' used to download parameters. The down-loaded parameter will not be active until an associated event occurs.

6.1.1 Parameter ID

• Scale factor ID
  • The valid scale factor IDs are 'SFxx', 'SGxx' and 'SHxx' for functions f, g and h, respectively. The 'xx' designates 01-15. Scale factor 00 is reserved for multiplication by 1.
• Look-up table ID
  • The valid function look-up table IDs are 'LFxx', 'LGxx' and 'LHxx' for functions f, g and h, respectively. The 'xx' designates 01-15. Look-up table 00 is reserved for null functions.
• Multiplier-Type ID
  • The valid multiplier IDs are 'MFxx', 'MGxx' and 'MHxx' for functions f, g and h, respectively. The 'xx' designates 01-15. Multiplier 00 is reserved for multiplication by 1.
• Variable-Type ID
  • The valid IDs for variables are 'VARG' and 'VARH' for functions g and h, respectively.
• Time Event ID
  • The valid ID for down-loading events to an event group is 'EVNT'.
• Rate ID
  • The valid ID for down-loading the update rate is 'RATE'.

6.1.2 Event group

An event group (EG00-EG15) may be specified in the 'LOAD' command record for the parameter with which to be associated. An event group entry is mandatory for down-loading 'EVNT'. 'RATE', 'VARG' and 'VARH' are not selectable by an event group. The event group entry shall be filled with 'NULL'.

Down-loading a parameter without specifying an associated event group is permitted. In this case 'NULL' must be used for the event group entry and the down loaded parameter(s) will not be selected until the 'ASSC' (associate) command for this parameter is executed. See 'ASSC' command description for details.

6.1.3 Parameters and Data Formats

6.1.3.1 Scale Factor

Scale factor ranging form -32768.0 to 32767.99997 with steps of 0.00003. Bit 32 is the sign bit.

6.1.3.2 Function f Look-Up Table

• f( delta-tn)
  • where n=0..127, f(delta-tn) are interleaved with delta-tn, as shown below:
    • delta-t0
    • f(delta-t0)
    • .
    • .
    • delta-t127
    • f(delta-t127 )

Delta-tn is 16-bit ordinal. f(delta-tn) is 32-bit two's complement, bit 32 is the sign bit. Bits 31-16 represent the integer portion and bits 15-0 represent the fractional portion.

6.1.3.3 Function g Look-UP table

• g( vgn)
  • where n=0..63, g(vgn) are interleaved with vgn, as shown below:
    • vg0
    • g(vg0)
    • .
    • .
    • vg63
    • g(vg63 )

vgn is a 24-bit two's complement number with format agreeable with Mdat. g(vgn) is 32-bit two's complement, bit 32 is the sign bit.

6.1.3.4 Function h Look-Up Table

• h( vhn)
  • where n=0..63, h(vhn) are interleaved with vhn, as shown below:
    • vh0
    • h(vh0)
    • .
    • .
    • vh63
    • h(vh63 )

vhn is 16-bit two's complement number with format agreeable with Mdat. h(vhn) is 32-bit two's complement, bit 32 is the sign bit. Bits 31-16 represent the integer portion and bits 15-0 represent the fractional portion.

6.1.3.5 Multiplier-Type

One entry per record. The valid data types are 0-511, in 16-bit ordinal. Types 0-255 correspond to Mdat type 0-255 for bipolar waveforms. Types 256-511 correspond to the absolute value of Mdat types 0-255 for unipolar waveforms.

6.1.3.6 Variable-Type

One entry per record. The valid data types are 0-255, in 8-bit ordinal. Variable types 0-255 correspond to Mdat types 0-255.

6.1.3.7 Event

Up to 8 entries per record. The valid Events are 0-255, in 8-bit ordinal.

6.1.3.8 Rate

One entry per list. The valid data are 720, 1000, 5000 and 10000, in 16-bit ordinal, corresponding to 720, 1000, 5000 and 10000 KHz.

6.2 Read

The read command is 'READ' which is the opposite of 'LOAD', except that there is no parameter list. The reply record will have the same format and contents as if down-loaded by a LOAD command, except that the command field will be 'RPLY'. The reply record will reflect the effective event association.

In addition to read back parameters down-loaded by 'LOAD' command, Read command is also used to read back analog channel circular buffers. Upon receive read command with the channel ID's, the waveform generator freeze the circular buffer until the read operation is completed. The circular buffer will be released at the end of read operation. Read command will be denied if the channel is in the pre- or post-trigger recording mode.

6.2.1 Parameter ID

In addition to the valid ID's for load command, 'CH00', 'CH01' and 'CH02' are valid ID's for read analog channel 0, 1 and 2, respectively.

6.2.2 Event group

'NULL' shall be used for this entry, except for read 'EVNT'.

6.2.3 Parameters and data format

None.

6.3 Associate

The associate command is 'ASSC' used to associate and disassociate a parameter with an event group. The newly associated parameter will not be effective until an event belonging to the group occurs. More than one special mode may be associated with an event group and must be done individually.

6.3.1 Parameter ID

The followings are valid parameter IDs for the 'ASSC' command.

• Scale factors:
  • 'SFxx', 'SGxx', 'SHxx'
• Multiplier Type:
  • 'MFxx', 'MGxx', 'MHxx'
• Look-Up Tables:
  • 'LFxx', 'LGxx', 'LTxx'
• Special Modes
  • 'STOP' Stop function from advancing when the event occurs.
  • 'CTNU' Resume (after being stopped) when the event occurs.
  • 'COPY' Copy the final value of the active f look-up table to the
  • surrounding entries of the of function g indexed by the current vg.
  • 'ST00' Start recording analog channel 0 on the event, post-triggered.
  • 'SP00' Stop recording analog channel 0 on the event, pre-triggered.
  • 'ST01' Start recording analog channel 1 on the event, post-triggered.
  • 'SP01' Stop recording analog channel 1 on the event, pre-triggered.
  • 'ST02' Start recording analog channel 2 on the event, post-triggered.
  • 'SP02' Stop recording analog channel 2 on the event, pre-triggered.

6.3.2 Event Group

The event group field is mandatory for this command. For special mode, also see 'ENBL' command. The valid event groups are 'EG00-EG15'. 'NULL' disassociates the parameter from an event group.

6.3.3 Parameters and Data Format

None.

6.4 Test

The test command 'TEST' is used for production test and on-line diagnosis. Test command can be used to run a comprehansive test or a selected test procedure with an event code and/or Mdat specified in the command packet. The wave form generator will send a reply packet at end of each test procedure to pass test results. The individual test procedure can be looped to assist troubleshooting.

6.4.1 Parameter ID

The valid parameter IDs for "TEST' are Txxx

• where xxx are 000 to 999.
  • T000 ----> No-op, test communication hand shaking and terminate on-ging looped test.
  • T999 ----> comprehansive

For other test procedures, see "Waveform generator test procedure" for the complete list.

6.4.2 Event group

The event group field is optional.

6.4.3 Parameters and data format

There will be three data entries in the test command record.

1. Mdat type, 8-bit ordinal.
2. Mdat value, 32-bit ordinal, 24 bit significant right justified.
3. loop counts, 0 = infinite.

There will be a list of error codes and/or measurement to be returned in the "RPLY" record. See " Waveform generator test procedure" for the details.

6.5 Enable

The enable command 'ENBL' enables one special mode which has been associated with an event group. 'ENBL' without 'ASSC' will have no effect on the desired mode. For read back analog channels, 'ENBL' only arm the trigger once. The Front-end must re-issue 'ENBL' to re-arm the trigger.

To disable a special mode use 'ASSC' command.

6.5.1 Parameter ID

• 'STOP' Stop function from advancing when the event occurs.
• 'CTNU' Resume (after being stopped) when the event occurs.
• 'COPY' Copy the final value of the active f look-up table to the surrounding entries of the of function g indexed by the current vg.
• 'ST00' Start recording analog channel 0 on the event.
• 'SP00' Stop recording analog channel 0 on the event.
• 'ST01' Start recording analog channel 1 on the event.
• 'SP01' Stop recording analog channel 1 on the event.
• 'ST02' Start recording analog channel 2 on the event.
• 'SP02' Stop recording analog channel 2 on the event.

6.5.2 Event group

'NULL'

6.5.3 Parameters and data format

None.

7 Error Code

7.1 Handshaking Error

Error codes can be read from the lower 5 bits of the handshaking status register. The error code defined for handshaking and command parsing are as follows:

• 0 No errors
• 1 Time-out: The Front-End Computer initiated a transaction which failed to complete within 5 second.
• 2 Undefined command
• 3 Undefined Parameter ID
• 4 Undefined Event group
• 5 Undefined machine data type
• 6 Undefined event type
• 7 Undefined special mode
• 10 Invalid parameter numerical range
• 11 Invalid look-up table offset
• 12 Invalid polarity

7.2 Waveform Generator Critical Error

The waveform generator critical error code which may interrupt the Front-end computer are defined as follows:

• 0 No errors
• 1 No event link carrier
• 2 No machine data link carrier
• 3 No permit link carrier
• 4 Power supply interface link failure
• 5 Event fifo full
• 6 ALU error

8 Mechanical Specification

The waveform generator is a standard 6U VME board with P1 and P2 connectors. The front panel is 4 hp wide with ejector handles. LED displays are visible from the front. The reset switch is accessible via a hole on the front panel.

Air cooling from the VME chassis fan tray is required. Heat-sinks may be added for certain components, as required.

9 Electrical Specification

9.1 Busses

The system bus electrical specification complies with VME specification 1014-87.

9.2 Power Supply

• +5v @ 5.0 amp.
• +12v @ 0.3 amp.